1. Field of the Invention
This invention relates to the field of data transfer between a computer system and a peripheral device.
2. Background Art
The Centronics.RTM. uni-directional 8-bit parallel host-to-peripheral device connection was developed in the mid-1960's for use with a series of small serial impact printers. (Centronics is a registered trademark of Genicom Corporation.) FIG. 1A illustrates a Centronics interface.
A parallel interface can be used to provide a communications link between a host and a peripheral device with a parallel interface (e.g., printer with a parallel interface). Data1 through Data8 transmit a character code to a peripheral device (e.g., printer). The host (i.e., computer system) generates two control signals. The strobe signal is used to transfer incoming data from the data lines into the peripheral device electronic circuitry. The input prime (i.e., init signal), when low, causes the input buffer to be cleared, the peripheral device's logic to be reset. In the case of a printer, the print head is further caused to be returned to the left margin.
There are five core signals (or status lines) that can be generated by a peripheral device. They are: Acknowledge (Ack), Busy, Paper Empty (PError), Select, and Fault. Ack is a negative going pulse that is used to verify the completed transfer of incoming data or to signal the completion of a functional operation (e.g., carriage return or form feed). An acknowledgment pulse must be received before a new code can be sent to the peripheral. Busy is a high going signal that provides a positive DC level indication during any interval when the printer cannot receive data, when a PError or a Fault exists, or an Init is present. PError indicates a paper empty condition. Select indicates that the printer is selected and available for data transfer. Fault indicates that a fault condition exists in the peripheral.
The first personal computers provided a parallel interface on the monochrome display adapter card that was compatible with the Centronics printer interface. The Personal Computer (PC) compatible Parallel Interface, added two additional control lines and modified the data transfer timing. FIG. 2A illustrates the PC-compatible parallel interface.
The two additional control lines are auto feed and select-in signals. The auto feed signal, when low, causes the paper to be automatically fed one line upon receipt and execution of a carriage return control code. The select-in, when low, enables data input into the peripheral device.
Both the Centronics and the PC-compatible parallel interface use the Data (i.e., Data1-Data8), Strobe, Busy, and Ack signals to coordinate data transfer. However, the PC-compatible can vary the sequence slightly. FIG. 1B provides a timing diagram for a data transfer using the Centronics interface. Data is loaded onto Data1-Data8 data lines. Once the data signals are settled, a Strobe signal changes from high to low to signal that incoming data was ready to be transferred from the data lines to the peripheral's electronic circuitry.
While the peripheral is taking the data from data lines, it communicates that it is unable to receive data with a high Busy signal. The Busy signal returns to a low state after receipt of the data, and a negative going Ack signal indicates completion of a data transfer.
The PC-compatible interface differs from the Centronics interface with respect to the Ack signal. FIG. 2B provides a timing diagram for a data transfer using the PC-compatible interface. The timing of the Data, Strobe, and Busy signals is the same as in the Centronics interface. However, unlike the Centronics interface, the Ack signal is generated, by some peripherals, within the Busy active period, or by other peripherals after the busy period.
A typical data transfer, using either the Centronics or PC-compatible parallel interfaces (i.e. standard parallel interface), requires the assertion of the data, control, and status signals for specific intervals. Each time a byte of data is sent to the peripheral, these signals are used to perform a process of handshaking. The host must set the data lines with the data's character code, and use the Strobe signal to indicate that the data lines contain new data. Upon recognition of the Strobe signal, the peripheral communicates a busy state using the Busy signal, and proceeds to transfer the data from the data lines. Once the peripheral completes this task, it resets Busy to indicate that it is no longer busy, and uses the Ack signal to indicate that it has successfully completed the data transfer.
The assertion of these handshaking signals reduces the theoretical data transfer rates available using the standard parallel interface. For example, the peripheral must assert Busy for 10 microseconds. Further, a Strobe pulse width is between 1 and 500 microseconds. Therefore, the theoretical data transfer rate is reduced by the practical need for a handshaking technique between the host and the peripheral. Thus, the use of all of these handshaking signals to transfer one byte of data results in the reduction of the data transfer rate that is theoretically possible with these parallel interfaces.
Further, a standard driver that manages a host's data transfer must execute at least four Input/Output (I/O) commands to transfer one byte of data. FIG. 3 illustrates a process flow for a standard driver for a printer peripheral device. At processing block 302, the status port is read. If busy, the printer cannot receive data. Therefore, if, at decision block 304 (i.e., "printer busy?"), it is determined that the printer is busy, processing continues at block 302 to monitor the status of the printer. If, at decision block 304, it is determined that the printer is not busy, processing continues at block 306 to write a byte to the data port. At block 308, an I/O operation is executed to set Strobe low. At block 310, Strobe is reset to high. Processing ends at block 312
Thus, as illustrated using a printer driver process flow, a parallel interface driver must execute at least four I/O instructions to transfer a single byte of data. Therefore, the theoretical maximum transfer rate is limited to 1/4 t bytes per second, where t is the time to complete a single I/O instruction. Because of the wait states induced for computer bus timing, these I/O instructions are very slow (i.e., approximately one-half million to one million I/O instructions per second) compared to memory or register-oriented instructions (i.e., 66 million register-to-register instructions per second). This translates to a maximum throughput of 125,000 to 250,000 bytes per second for most computers. Thus, by eliminating the need for one or more of these instructions, a higher theoretical maximum transfer rate can be achieved.
The standard parallel interface is in widespread use throughout the computer industry. This parallel interface has become the de facto industry standard. Further, most printers support this interface. The current generation of personal computers (i.e., 80.times.86-based computer systems) provide greater computing capabilities than provided by the original personal computers that introduced the parallel interface.
Further, the printers used by these newer generation computers provide increased speed and print quality. For example, a common laser printer can print eight pages per minute using 600 dots per inch resolution. A letter-size page on this printer contains 600.times.600.times.8.5.times.11, or 33.66 million dots arranged in a raster bitmap pattern. Each dot is described by a single bit of information in the computer. Thus, such a page contains about 4.2 million bytes of data. If the entire page is generated as a bitmap on the host computer and sent to the printer fast enough to drive the printer at its rated speed (i.e., 8 ppm), an average transfer rate must be at least 560 k bytes per second. However, imaging burst rates, because of idle gaps between pages, are approximately 750-900 Kb per second. Therefore, the transfer rates provided by the standard parallel interface are inadequate to accommodate these burst rates and to directly and continuously drive a printing engine for these newer printers.
To overcome the lack of speed of the standard parallel interface, laser printers typically include a printing engine and a controller card. The controller card provides the intelligence needed to generate the print image and drive the printing engine. A print request and raw data are sent to the printer in a compact representation (e.g., Hewlett Packard PCL or Adobe Postscript) that transfers more quickly across a parallel port, but requires significant processing by the printer's controller card to get a raster bitmap pattern. The controller card generates the print image and drives the laser engine.
The advantage of placing the image generation capability in the printer is that there is no need to modify existing computer systems. There have been other attempts to overcome the slow data transfer rates of the standard interface that introduce a different, faster interface. However, these methods required the installation of additional hardware in the computer, printer, or both. These other attempts have not met with much commercial success.
The disadvantage of placing the print generation in the peripheral device is that it unnecessarily inflates the cost of the device. For example, manufacturing costs for the controller card needed in a printer to generate the print image can be as much as $400.00. If the print generation is done by the computer and the print image transferred to the printer at a rate sufficient to drive the laser engine, the cost of the printer's controller card can be reduced considerably. Further, the increased capabilities of the computer can be used. This can result in an ability to provide a high quality printer at a more affordable price.
Finally, there is a new standard for an asynchronous, fully interlocked, bi-directional parallel peripheral interface proposed by the Institute of Electrical and Electronic Engineers, Inc. (IEEE). This standard (i.e., IEEE 1284) recommends new electrical interfaces, cabling, and interface hardware. Thus, while this standard addresses the need for faster data transfer, implementation of IEEE 1284, in its entirety, requires hardware other than that currently used in the existing base of computer systems.